Product Bulletin
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AR5002X Solution Highlights
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Support for IEEE 802.11a, 802.11b, 802.11g
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Universal wireless connectivity for seamless
roaming between any 802.11-based network
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Uses digital CMOS technology exclusively,
minimizing power consumption and cost while maximizing reliability
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Highly integrated 2-chip set
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2.4/5 GHz dual band Radio-on-a-Chip (RoC)
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Multiprotocol MAC/baseband processor that
supports the RoC
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Wireless Multimedia Enhancements Quality of
Service support (QoS)
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Super AG® mode delivers up to 108 Mbps raw data rate with typical end
user throughput exceeding 60 Mbps
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Hardware encryption for the Wi-Fi Protected Access (WPA) and IEEE
802.11i security specifications, provides Advanced Encryption
Standard (AES), Temporal Key Integrity Protocol (TKIP) and Wired
Equivalent Privacy (WEP) without performance degradation
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Extended tuning range (2.300-2.500 & 4.900-5.850
GHz) for worldwide use
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Dynamic Frequency Selection/Transmit Power
Control (DPS/TPC) for international operation
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Support for draft IEEE 802.11e, h, and i
standards
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Enhanced third generation performance,
transmission range and reliability
The chipset includes:
AR5112 Dual band
Radio-on-a-Chip (RoC)
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All CMOS dual band radio chip
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Dynamic IF Dual Conversion architecture provides
super-heterodyne performance at Zero IF prices
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Support for IEEE 802.11a, 802.11b, 802.11g
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Operates from 2.3-2.5 GHz and 4.900-5.850 GHz
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Integrated third-generation power amplifier (PA)
and low-noise amplifier (LNA)
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External PA and/or LNA can be used for special
applications
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Eliminates all IF filters and most RF filters;
no external voltage-controlled oscillators (VCOs) or surface
acoustic wave (SAW) filters needed
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Increased sensitivity and multipath tolerance
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Enhanced transmit and receive chains
AR5212 Multiprotocol MAC/baseband processor
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Supports both 2.4 GHz and 5 GHz RoCs
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Super AG® mode includes dynamic 108 Mbps
capability, real-time hardware data compression, dynamic
transmit optimization and standards-compliant bursting
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No external FLASH or RAM memory needed
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PCI 2.3 and PC Card 7.1 host interfaces with DMA
support
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Integrated analog-to-digital and
digital-to-analog converters
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Serial EEPROM, LEDs, GPIOs peripheral interfaces
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Low power operational and sleep modes
AR5002X WLAN System Architecture

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AR5002X Chipset Specifications |
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Frequency Band |
4.900 to 5.850 GHz and 2.300 to 2.500 GHz |
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Network Standard |
802.11a, 802.11b, 802.11g |
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Modulation Technology |
OFDM with BPSK,
QPSK, 16 QAM, 64 QAM; |
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DBPSK, DQPSK, CCK |
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FEC Coding Rates |
1/2, 1/3, 3/4 |
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Hardware
Encryption |
AES, TKIP, WEP |
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Quality of Service |
802.11e draft |
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Media Access Technique |
CSMA/CA |
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Host Interface |
Mini PCI, PC Card, PCI |
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Communication Interface |
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Peripheral Interface |
GPIOs, LEDs |
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Memory Interface |
EEPROM |
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Supported Data Rates |
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IEEE 802.11a, 802.11b, 802.11g Standard Mode |
1-54 Mbps |
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Atheros Super A Mode |
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Atheros Super G Mode |
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Atheros Super A/G Mode |
1 - 108 Mbps |
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Chip Specifications |
AR5112 |
AR5212 |
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Operating Voltage |
2.5V +/-5% 3.3V +/-10% |
2.5V +10%, -5% 3.3V +/-10% |
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Package Dimensions |
9mm x 9mm |
15mm x 15mm |
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Packaging |
64 Leadless Plastic Chip
Carrier |
196 Plastic Ball Grid
Array |
* Theoretical wireless link rate based on applicable
IEEE 802.11 standards. Actual user throughput will be lower than the
theoretical link rate and will vary, as network conditions and
environmental factors can lower actual throughput rate. |